mirror of
https://github.com/zsa/qmk_firmware.git
synced 2026-01-09 15:12:33 +00:00
It's alive!!!! i2c2 that is!
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@@ -1,5 +1,5 @@
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// Copyright (c) 2018 Cirque Corp. Restrictions apply. See: www.cirque.com/sw-license
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#include "i2c_master.h"
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#include "i2c2_master.h"
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#include "cirque_tm040040.h"
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#include "pointing_device.h"
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@@ -71,6 +71,7 @@ void pointing_device_task(void) {
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/* Pinnacle-based TM040040 Functions */
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void pointing_device_init(void) {
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i2c2_init();
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// Host clears SW_CC flag
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Pinnacle_ClearFlags();
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@@ -185,19 +186,19 @@ void RAP_ReadBytes(uint8_t address, uint8_t* data, uint8_t count) {
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uint8_t cmdByte = READ_MASK | address; // Form the READ command byte
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// uint8_t i = 0;
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i2c_start(SLAVE_ADDR << 1);
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i2c_writeReg(SLAVE_ADDR << 1, cmdByte, NULL, 0, I2C_TIMEOUT);
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i2c_readReg(SLAVE_ADDR << 1, cmdByte, data, count, I2C_TIMEOUT);
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i2c_stop();
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i2c2_start(SLAVE_ADDR << 1);
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i2c2_writeReg(SLAVE_ADDR << 1, cmdByte, NULL, 0, I2C_TIMEOUT);
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i2c2_readReg(SLAVE_ADDR << 1, cmdByte, data, count, I2C_TIMEOUT);
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i2c2_stop();
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}
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// Writes single-byte <data> to <address>
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void RAP_Write(uint8_t address, uint8_t data) {
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uint8_t cmdByte = WRITE_MASK | address; // Form the WRITE command byte
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i2c_start(SLAVE_ADDR << 1);
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i2c_writeReg(SLAVE_ADDR << 1, cmdByte, &data, sizeof(data), I2C_TIMEOUT);
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i2c_stop();
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i2c2_start(SLAVE_ADDR << 1);
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i2c2_writeReg(SLAVE_ADDR << 1, cmdByte, &data, sizeof(data), I2C_TIMEOUT);
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i2c2_stop();
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}
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/* Logical Scaling Functions */
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@@ -79,27 +79,27 @@ __attribute__((weak)) void i2c2_init(void) {
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i2c_status_t i2c2_start(uint8_t address) {
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i2c_address = address;
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i2cStart(&I2C_DRIVER, &i2cconfig);
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i2cStart(&I2C2_DRIVER, &i2cconfig);
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return I2C_STATUS_SUCCESS;
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}
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i2c_status_t i2c2_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout) {
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i2c_address = address;
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i2cStart(&I2C_DRIVER, &i2cconfig);
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msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, 0, 0, TIME_MS2I(timeout));
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i2cStart(&I2C2_DRIVER, &i2cconfig);
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msg_t status = i2cMasterTransmitTimeout(&I2C2_DRIVER, (i2c_address >> 1), data, length, 0, 0, TIME_MS2I(timeout));
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return chibios_to_qmk(&status);
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}
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i2c_status_t i2c2_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) {
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i2c_address = address;
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i2cStart(&I2C_DRIVER, &i2cconfig);
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msg_t status = i2cMasterReceiveTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, TIME_MS2I(timeout));
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i2cStart(&I2C2_DRIVER, &i2cconfig);
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msg_t status = i2cMasterReceiveTimeout(&I2C2_DRIVER, (i2c_address >> 1), data, length, TIME_MS2I(timeout));
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return chibios_to_qmk(&status);
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}
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i2c_status_t i2c2_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout) {
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i2c_address = devaddr;
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i2cStart(&I2C_DRIVER, &i2cconfig);
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i2cStart(&I2C2_DRIVER, &i2cconfig);
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uint8_t complete_packet[length + 1];
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for (uint8_t i = 0; i < length; i++) {
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@@ -107,15 +107,15 @@ i2c_status_t i2c2_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data
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}
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complete_packet[0] = regaddr;
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msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), complete_packet, length + 1, 0, 0, TIME_MS2I(timeout));
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msg_t status = i2cMasterTransmitTimeout(&I2C2_DRIVER, (i2c_address >> 1), complete_packet, length + 1, 0, 0, TIME_MS2I(timeout));
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return chibios_to_qmk(&status);
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}
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i2c_status_t i2c2_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) {
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i2c_address = devaddr;
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i2cStart(&I2C_DRIVER, &i2cconfig);
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msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), ®addr, 1, data, length, TIME_MS2I(timeout));
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i2cStart(&I2C2_DRIVER, &i2cconfig);
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msg_t status = i2cMasterTransmitTimeout(&I2C2_DRIVER, (i2c_address >> 1), ®addr, 1, data, length, TIME_MS2I(timeout));
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return chibios_to_qmk(&status);
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}
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void i2c2_stop(void) { i2cStop(&I2C_DRIVER); }
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void i2c2_stop(void) { i2cStop(&I2C2_DRIVER); }
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@@ -77,8 +77,8 @@
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# endif
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#endif
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#ifndef I2C_DRIVER
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# define I2C_DRIVER I2CD2
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#ifndef I2C2_DRIVER
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# define I2C2_DRIVER I2CD2
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#endif
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#ifdef USE_GPIOV1
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@@ -23,7 +23,7 @@
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// for future hardware
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#undef STM32_I2C_USE_I2C2
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#define STM32_I2C_USE_I2C2 TRUE
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#define STM32_I2C_USE_I2C2 TRUE
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#undef STM32_I2C_I2C2_IRQ_PRIORITY
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#define STM32_I2C_I2C2_IRQ_PRIORITY 12
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@@ -159,7 +159,7 @@
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* I2C driver system settings.
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*/
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#define STM32_I2C_USE_I2C1 TRUE
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#define STM32_I2C_USE_I2C2 FALSE
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#define STM32_I2C_USE_I2C2 TRUE
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#define STM32_I2C_BUSY_TIMEOUT 50
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#define STM32_I2C_I2C1_IRQ_PRIORITY 10
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#define STM32_I2C_I2C2_IRQ_PRIORITY 10
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