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When automatic PLL management mode is enabled on the U4 series AVR8 chips, the PLL is now configured for 48MHz and not a divided 96MHz, to lower power consumption and to keep the system within the datasheet specs for 3.3V operation (thanks to Scott Vitale).
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@@ -68,7 +68,7 @@ void USB_Init(
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if (!(USB_Options & USB_OPT_MANUAL_PLL))
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{
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#if defined(USB_SERIES_4_AVR)
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PLLFRQ = ((1 << PLLUSB) | (1 << PDIV3) | (1 << PDIV1));
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PLLFRQ = (1 << PDIV2);
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#endif
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}
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